SWAN is one of the three centers created in 2006 by the Semiconductor Research Corporation Nanoelectronics Research Initiative ( SRC-NRI) to find a replacement to conventional metal oxide semiconductor field effect transistors.
SRC-NRI is a consortium of TI, Freescale, AMD, MICRON, Intel and IBM.
Matching funds have been provided by the State of Texas Emerging Technology Fund
The Microelectronics Research Center at The University of Texas at Austin (MRC) provides opportunities to perform research in novel materials of interest to the IC industry, optoelectronics and nanophotonics, novel electronic devices and nano-structures, interconnects and packaging.
The UT-MRC laboratories are located at the JJ Pickle Research Campus, in northwest Austin.
The UT-MRC laboratories reach users from many different backgrounds: electronics, optics, physics, chemistry, astronomy, as well as chemical, mechanical, and petroleum engineering. Lab users include The University of Texas as well as non-UT academic and industrial users. The MRC is more than a clean room with open-access to advanced nano-fabrication equipment. - It is a community of scientists who work together to share knowledge.
Other micro/nano-fabrication facilities include sputter, e-beam and plasma deposition for Al, silicide's and dielectrics, reactive ion etching, rapid thermal processing and oxidation/diffusion furnaces for Si, Si-Ge and High-K dielectrics, LPCVD for poly-silicon, oxides, nitrides and numerous wet chemistry stations. The characterization laboratories contain apparatus for comprehensive optical and electrical measurement.
A professional and experienced cadre of facilities and equipment technicians and engineers, who not only maintain the tools and provide training to new users, but are also able to help support and collaborate with you concerning your project.
The facilites include 12,000 sq. ft. of Class 100 and Class 1000 clean-room space for Si. III-V and soft material processing. The clean roomalso contains a JEL - 6000F/E based electron beam lithography system capable of 20nm resolution on masks, small substrates and 8" wafers. This e-beam system is used to generate templates for the Step and Flash Imprint Lithography tool. The S-FIL process is a nano-imprint scheme or patterning of features in the sub-micron regime with the ability to perform layer-to-layer alignment through a transparent template to sub-tenth micron accuracy.